Design a combinational circuit with four input lines that represent a decimal digit in BCD and four output lines that generate the 9’s complement of the input digit.

 Design a combinational circuit with four input lines that represent a decimal digit in BCD and four output lines that generate the 9’s complement of the input digit.

SIMULATION

RTL ANALYSIS

VERILOG CODE

module bcd_to_9scom( input A,B,C,D, output W,X,Y,Z ); 

 assign W=(!A&!B&!C); 

 assign X=(B^C); 

 assign Y=(C); 

 assign Z=!D;

 endmodule

TESTBENCH CODE

module bcd_to_9scom_tb(); 

 reg A,B,C,D; wire W,X,Y,Z;

 bcd_to_9scom bcd(A,B,C,D,W,X,Y,Z); 

 initial begin

 A=0;B=0;C=0;D=0;

 #100

 A=0;B=0;C=0;D=1;

 #100

 A=0;B=0;C=1;D=0;

 #100

 A=0;B=0;C=1;D=1; 

 #100 

 A=0;B=1;C=0;D=0;

 #100

 A=0;B=1;C=0;D=1; 

 #100

 A=0;B=1;C=1;D=0; 

 #100 

 A=0;B=1;C=1;D=1;

 #100

 A=1;B=0;C=0;D=0;

 #100

 A=1;B=0;C=0;D=1;

 #100

 A=1;B=0;C=1;D=0;

 #100

 A=1;B=0;C=1;D=1; 

 #100

 A=1;B=1;C=0;D=0; 

 #100

 A=1;B=1;C=0;D=1; 

 #100

 A=1;B=1;C=1;D=0;

 #100

 A=1;B=1;C=1;D=1; 

 #100

 $stop; 

 end 

 endmodule